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Mit steigenden Taktraten wachsen auch die Anforderungen an das Leiterplattendesign. Damit Signale auf der Leiterplatte unverfälscht übertragen werden können, müssen die Impedanzanforderungen der Baugruppe im PCB-Design berücksichtigt werden.
In diesem Webinar zeigen wir, wie aus der Simulation und den elektrischen Randbedingungen ein impedanzdefinierter Lagenaufbau entsteht.
As data rates increase, so do the demands on PCB design. To ensure that signals are transmitted on the PCB without distortion, the impedance requirements of the assembly or application must be properly considered in the PCB design.
In this webinar, we will show how an impedance-defined stackup is created based on simulation results and electrical boundary conditions.
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