Topologie | Sonstige Topologie |
IC-Revision | E |
The AD4020 is a low noise, low power, high speed, 20-bit, 1.8 MSPS precision successive approximation register (SAR) analog-to-digital converter (ADC). It incorporates ease of use features that lower the signal chain power, reduce signal chain complexity, and enable higher channel density. The high-Z mode, coupled with a long acquisition phase, eliminates the need for a dedicated high power, high speed ADC driver, thus broadening the range of low power precision amplifiers that can drive this ADC directly, while still achieving optimum performance. The input span compression feature enables the ADC driver amplifier and the ADC to operate off common supply rails without the need for a negative supply while preserving the full ADC code range. The low serial peripheral interface (SPI) clock rate requirement reduces the digital input/output power consumption, broadens processor options, and simplifies the task of sending data across digital isolation.
Artikel Nr. | Datenblatt | Simulation | Downloads | Status | Produktserie | Z @ 100 MHz (Ω) | Zmax (Ω) | Testbedingung Zmax | IR 2 (mA) | RDC max. (Ω) | Typ | Muster | |
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742792141 | SPEC | 8 Dateien | Aktiv i| Produktion ist aktiv. Erwartete Lebenszeit: >10 Jahre. | WE-CBF SMT-Ferrit | 1000 | 1100 | 90 MHz | 1000 | 0.3 | High Current |
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Artikel Nr. | Datenblatt | Simulation | Downloads | Status | Produktserie | Z @ 100 MHz (Ω) | Zmax (Ω) | Testbedingung Zmax | IR 2 (mA) | RDC max. (Ω) | Typ | Muster |
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