Texas Instruments TPS54116-Q1

Beschreibung

TPS54116-Q1 2.95-V to 6-V Input, 4-A Step-Down Converter and 1-A Source/Sink DDR Termination RegulatorThe TPS54116-Q1 buck regulator minimizes solutionsize by integrating the MOSFETs and reducinginductor size with up to 2.5-MHz switching frequency.The switching frequency can be set above themedium wave radio band for noise sensitiveapplications and is synchronizable to an externalclock. Synchronous rectification keeps the frequencyfixed across the entire output load range. Efficiency ismaximized through integrated 25-mΩ low-side and33-mΩ high-side MOSFETs. Cycle-by-cycle peakcurrent limit protects the device during an overcurrentcondition and is adjustable with a resistor at the ILIMpin to optimize for smaller inductors.

Eigenschaften

AEC-Q100 Qualified With the Following Results:– Device Temperature Grade 1: –40°C to+125°C Ambient Operating TemperatureRange– Device HBM ESD Classification Level 2– Device CDM ESD Classification Level C6

• Single-chip DDR2, DDR3 and DDR3L MemoryPower Solution
• 4-A Synchronous Buck Converter– Integrated 33-mΩ High-side and 25-mΩ LowsideMOSFETs– Fixed Frequency Current-mode Control– Adjustable Frequency from 100 kHz to 2.5MHz– Synchronizable to an External Clock– 0.6-V ±1% Voltage Reference OverTemperature– Adjustable Cycle-by-Cycle Peak Current Limit– Monotonic Start-up Into Pre-biased Outputs
• 1-A Source/Sink Termination LDO with ±20-mVDC Accuracy– Stable with 2 × 10-μF MLCC Capacitor– 10-mA Source/Sink Buffered Reference OutputRegulated to Within 49% to 51% of VDDQ
• Independent Enable Pins with Adjustable UVLOand Hysteresis
• Thermal Shutdown
• -40°C to 150°C Operating TJ
• 24-pin, 4-mm x 4-mm WQFN Package

Typische Anwendungen

• Infotainment and Cluster
• SSTL_18, SSTL_15, SSTL_135, SSTL_12 and HSTL Termination
• Advanced Driver Assistance Systems (ADAS)
• DDR2, DDR3, DDR3L, and DDR4 Memory Power Supplies in Embedded Computing Systems

Weiterführende Informationen

• Datenblatt
• Produktseite des IC-Herstellers