Topologie | Sonstige Topologie |
The ADL5324 incorporates a dynamically adjustable biasing circuit that allows for the customization of OIP3 and P1dB performance from 3.3 V to 5 V, without the need for an external bias resistor. This feature gives the designer the ability to tailor driver amplifier performance to the specific needs of the design. This feature also creates the opportunity for dynamic biasing of the driver amplifier where a variable supply is used to allow for full 5 V biasing under large signal conditions, and then reduced supply voltage when signal levels are smaller and lower power consumption is desirable. This scalability reduces the need to evaluate and inventory multiple driver amplifiers for different output power requirements, from 25 dBm to 29 dBm output power levels.
Artikel Nr. | Datenblatt | Simulation | Downloads | Status | Produktserie | Leiterplattendicke (mm) | f | Mittelkontakt | Betriebstemperatur | L (nH) | Tol. L | Testbedingung L | Qmin. (%) | Testbedingung Q | RDC max. (Ω) | IR (mA) | fres (MHz) | Muster | |
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744765056GA | SPEC | 10 Dateien | Aktiv i| Produktion ist aktiv. Erwartete Lebenszeit: >10 Jahre. | WE-KI Keramik-SMT-Induktivität | – | – | – | -40 °C up to +125 °C | 5.6 | ±0.2nH | 250 MHz | 23 | 250 MHz | 0.083 | 760 | 5800 | |||
60312202114513 | SPEC | – | 6 Dateien | Aktiv i| Produktion ist aktiv. Erwartete Lebenszeit: >10 Jahre. | WR-SMA PCB End Launch | 1.6 | DC~18 GHz | Ø 0.51 WIDE x 0.25 THK | -65 °C up to +165 °C | – | – | – | – | – | – | – | – |
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744765056GA | SPEC | ||
60312202114513 | SPEC | – |
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Artikel Nr. | Datenblatt | Simulation | Downloads | Status | Produktserie | Leiterplattendicke (mm) | f | Mittelkontakt | Betriebstemperatur | L (nH) | Tol. L | Testbedingung L | Qmin. (%) | Testbedingung Q | RDC max. (Ω) | IR (mA) | fres (MHz) | Muster |
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