Microchip dsPIC33FJ09GS302

Eigenschaften

• CPU

• Up to 40 MIPS Operation (at 3.0-3.6V)

• 16 x 16 Fractional/Integer Hardware Multiply, Single Cycle Execution

• Single-Cycle Multiply and Accumulate

• 32-bit by 16-bit Hardware Divider

• C Compiler Optimized Instruction Set

• System

• Internal oscillator and Phase-Locked Loop (PLL) with 120 MHz VCO

• On-chip LDO Voltage Regulator

• JTAG Boundary Scan and Flash Memory Program Support

• Fail-Safe Clock Monitor – allows safe shutdown if clock fails

• Watchdog Timer with separate RC oscillator

• High-Speed PWM Module FeaturesThree pairs of PWM outputs

• Dead Time for Rising and Falling EdgesDuty Cycle Resolution of 1.04 ns for Dead-Time, Phase Shift, and Frequency

• Supported PWM modes: Standard Edge-Aligned, True Independent Output, Complementary, Center-Aligned, Push-Pull, Multi-Phase, Variable Phase, Fixed Off-Time, Current Reset, and Current-Limit

• PWMxL, PWMxH Output Pin Swapping

• PWM4H, PWM4L Pins Remappable

• On-the-Fly PWM Frequency, Duty Cycle and Phase Shift Changes

• High-Speed Analog Comparator

• Two Analog Comparators

• 10-bit DAC for each analog comparator

• DACOUT pin to provide DAC output

• High-Speed ADC

• 10-Bit Resolution

• 8 Input Channels

• 2 Msps Conversion rate

• Independent Trigger Source Section for each Analog Input Conversion Pair

• Peripherals

• UART Module with LIN and IrDA® support

• SPI Module with FIFO

• I2C™ Module with Master and Slave Modes

• 2 16-bit Timer Modules

• 1 Input Capture and 1 Output Compare / PWM