Renesas TW6874

Beschreibung

The TW6874 is a quad triple-rate (SD/HD/3G) SDI receiver. It has four independent channels, each consisting of an adaptive equalizer, clock data recovery, audio decoder and VC-2 decompression engine. Each channel can receive up to 2.97Gbps serial data over extended coaxial cable lengths anddeserialize the data into video/audio streams for the back-end device.The video streams are output as: 8-bit BT.656 for SD; BT.1120 in 8/16 bit mode for HD; or BT.1120 for 3G. The audio streams are output through an I2S audio digital interface in a multi-channel interleaving format. In addition to the extraction of embedded SDI audio, the TW6874 incorporates a 5-channel audio ADC decoder to decode analog audio inputs and outputthem through the same I2S interface. A visually lossless VC-2 (Dirac) compression/decompression engine is implemented in the TW6872/TW6874 SDI Tx/Rx pair to extend the reach of HD-SDI to that of SD-SDI. An interrupt pin can be used to signal the host processor of any conditions such as loss of video, audio detection and ancillary data packet detection. Finally, integrated audio test patternsand PRBS checker ease system design and implementation.

Eigenschaften

• Quad triple-rate (SD/HD/3G) SDI receiver for standard (SD)and high (HD/3G) definition 8-bit component video
• Automatic SDI detection of SMPTE 259M Level C (SD-SDI),SMPTE ST 292 (1.5G SDI), and SMPTE 424M (3G SDI)signals
• Each SDI input standard supported with ITU-R BT.656 (SD) orITU-R BT.1120 (1.5G and 3G) interface
• Automatic SDI detection among ITU-R BT.656/SMPTE 259MLevel C, ITU-R BT.1120/SMPTE ST 292, SMPTE 424Msignals
• Converts 10-bit serial digital component video input to 8-bitparallel video output
• Adaptive equalizer/clock data recovery/VC-2 decompressionengine for each channel
• 4 separate video output ports with BT. 656/BT. 1120 outputformat
• 5-channel audio ADC (analog-to-digital converter)
• Single multiplexed audio output DAC (digital-to-analogconverter)
• Supports I2S master/slave interface for record output andplayback input with cascade
• I2C and SPI interface
• Pb-free (RoHS compliant) 256 ball LFBGA

Typische Anwendungen

• SD/HD/3G-SDI DVR

Weiterführende Informationen

• Datenblatt
• Produktseite des IC-Herstellers