Texas Instruments SN74LVC2G125YZPR | Demoboard Si-MB4002A

Beschreibung

The SN74LVC2G125 device is a dual bus buffergate, designed for 1.65-V to 5.5-V VCC operation.This device features dual line drivers with 3-stateoutputs. The outputs are disabled when theassociated output-enable (OE) input is high.NanoFree™ package technology is a majorbreakthrough in IC packaging concepts, using the dieas the package.To ensure the high-impedance state during power upor power down, OE should be tied to VCC through apullup resistor; the minimum value of the resistor isdetermined by the current-sinking capability of thedriver.This device is fully specified for partial-power-downapplications using Ioff. The Ioff circuitry disables theoutputs, preventing damaging current backflowthrough the device when it is powered down.

Eigenschaften

• ESD Protection Exceeds JESD 22– 2000-V Human-Body Model– 1000-V Charged-Device Model
• Available in the Texas InstrumentsNanoFree™ Package
• Supports 5-V VCC Operation
• Inputs Accept Voltages to 5.5 V
• Max tpd of 4.3 ns at 3.3 V
• Low Power Consumption, 10-µA Max ICC
• ±24-mA Output Drive at 3.3 V
• Typical VOLP (Output Ground Bounce)< 0.8 V at VCC = 3.3 V, TA = 25°C
• Typical VOHV (Output VOH Undershoot)

  2 V at VCC = 3.3 V, TA = 25°C

• Ioff Supports Live Insertion, Partial-Power-DownMode, and Back-Drive Protection
• Can Be Used as a Down Translator to TranslateInputs From a Max of 5.5 V Downto the VCC Level
• Latch-Up Performance Exceeds 100 mA PerJESD 78, Class II

Typische Anwendungen

• Application development and debugging of wireless products

Weiterführende Informationen

• Datenblatt
• Produktseite des IC-Herstellers