Topology | Other Topology |
Input voltage | 5 V |
IC revision | A00 |
The SN74LVC2G125 device is a dual bus buffergate, designed for 1.65-V to 5.5-V VCC operation.This device features dual line drivers with 3-stateoutputs. The outputs are disabled when theassociated output-enable (OE) input is high.NanoFree™ package technology is a majorbreakthrough in IC packaging concepts, using the dieas the package.To ensure the high-impedance state during power upor power down, OE should be tied to VCC through apullup resistor; the minimum value of the resistor isdetermined by the current-sinking capability of thedriver.This device is fully specified for partial-power-downapplications using Ioff. The Ioff circuitry disables theoutputs, preventing damaging current backflowthrough the device when it is powered down.
2 V at VCC = 3.3 V, TA = 25°C
Order Code | Datasheet | Simulation | Downloads | Status | Product series | Z @ 100 MHz (Ω) | Zmax (Ω) | Test Condition Zmax | IR 2 (mA) | RDC max. (Ω) | Type | Samples | |
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742792796 | SPEC | 8 files | Active i| Production is active. Expected lifetime: >10 years. | WE-CBF SMT EMI Suppression Ferrite Bead | 1000 | 1200 | 200 MHz | 550 | 1.5 | Wide Band |
Samples |
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Order Code | Datasheet | Simulation | Downloads | Status | Product series | Z @ 100 MHz (Ω) | Zmax (Ω) | Test Condition Zmax | IR 2 (mA) | RDC max. (Ω) | Type | Samples |
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