Topologie | Sperrwandler |
Ausgang 1 | 18 V |
IC-Revision | C |
This TI Verified Design provides the theory, component selection, TINA-TI simulations, Verification & Measurement Performance, Altium Schematics, PCB Layout for a Phase Compensated 8-Ch Multiplexed Data Acquisition System for Power Automation. The design uses a 16-bit, 8-Channel, 500ksps SAR ADC, ADS8688 with integrated analog front-end circuit for ease of system hardware design.The design introduces the concept of phase and phase Compensation, compares the additional phase delay introduced between the input channels of a non-simultaneous sampling ADC with a simultaneous sampling ADC, and provides a optimal algorithm to compensate for the phase delay introduced in a non-simultaneous implementation.Measured results demonstrate how the phase compensation algorithm used in this design compensates for the additional phase delay introduced by a multiplexed ADC, resulting in an equivalent performing solution as compared to a simultaneous sampling ADC solution.
Artikel Nr. | Datenblatt | Simulation | Downloads | Status | Produktserie | L1 (µH) | L2 (µH) | IR 1 (A) | IR 2 (A) | ISAT 1 (A) | RDC1 typ (Ω) | RDC2 typ (Ω) | RDC1 max (Ω) | RDC2 max (Ω) | fres (MHz) | Typ | Muster | |
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744870471 | SPEC | 8 Dateien | Aktiv i| Produktion ist aktiv. Erwartete Lebenszeit: >10 Jahre. | WE-DD SMT-Doppeldrossel | 470 | 470 | 0.7 | 0.7 | 0.9 | 1 | 1 | 1.2 | 1.2 | 0.65 | Gekreuzt |
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Artikel Nr. | Datenblatt | Simulation | Downloads | Status | Produktserie | L1 (µH) | L2 (µH) | IR 1 (A) | IR 2 (A) | ISAT 1 (A) | RDC1 typ (Ω) | RDC2 typ (Ω) | RDC1 max (Ω) | RDC2 max (Ω) | fres (MHz) | Typ | Muster |
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