Topologie | FPGA |
IC-Revision | A |
This reference design uses the UCD3138064A as a digital controller to control inverting buck-boost with the capability of supporting two-phase peak current mode control. The soft-switching technology is used in this design to improve the power efficiency. The input voltage range is -62 V to -36 V. The output voltage range is adjustable from 28 V to 52 V. The default output voltage is 48-V with a maximum current of 14 A.
High efficiency above 97.1%Interleaved two-phase peak current mode (PCM) controlThree phases with voltage mode (VM) controlZero voltage switching of MOSFETsPre-biased start upCurrent balancing between phases
Artikel Nr. | Datenblatt | Downloads | Status | Produktserie | Pins (Value) (pcs) | Reihen | Gender | Typ | IR (A) | Verpackung | Muster | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
61300111121 | SPEC | 6 Dateien | Aktiv i| Produktion ist aktiv. Erwartete Lebenszeit: >10 Jahre. | WR-PHD 2.54 mm THT Pin Header | 1 | Single | Pin Header | Gerade | 3 | Beutel |
Artikel Nr. | Datenblatt | |
---|---|---|
61300111121 | SPEC |
Muster |
---|
Artikel Nr. | Datenblatt | Downloads | Status | Produktserie | Pins (Value) (pcs) | Reihen | Gender | Typ | IR (A) | Verpackung | Muster |
---|