Topology | FPGA |
IC revision | A |
This reference design uses the UCD3138064A as a digital controller to control inverting buck-boost with the capability of supporting two-phase peak current mode control. The soft-switching technology is used in this design to improve the power efficiency. The input voltage range is -62 V to -36 V. The output voltage range is adjustable from 28 V to 52 V. The default output voltage is 48-V with a maximum current of 14 A.
High efficiency above 97.1%Interleaved two-phase peak current mode (PCM) controlThree phases with voltage mode (VM) controlZero voltage switching of MOSFETsPre-biased start upCurrent balancing between phases
Order Code | Datasheet | Downloads | Status | Product series | Pins (Value) (pcs) | Rows | Gender | Type | IR (A) | Packaging | Samples | |
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61300111121 | SPEC | 6 files | Active i| Production is active. Expected lifetime: >10 years. | WR-PHD 2.54 mm THT Pin Header | 1 | Single | Pin Header | Straight | 3 | Bag |
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61300111121 | SPEC |
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Order Code | Datasheet | Downloads | Status | Product series | Pins (Value) (pcs) | Rows | Gender | Type | IR (A) | Packaging | Samples |
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