Topology | Other Topology |
IC revision | D |
The AD4020 is a low noise, low power, high speed, 20-bit,1.8 MSPS precision successive approximation register (SAR)analog-to-digital converter (ADC). It incorporates ease of usefeatures that lower the signal chain power, reduce signal chaincomplexity, and enable higher channel density. The high-Z mode,coupled with a long acquisition phase, eliminates the need for adedicated high power, high speed ADC driver, thus broadening therange of low power precision amplifiers that can drive this ADCdirectly, while still achieving optimum performance. The inputspan compression feature enables the ADC driver amplifier and theADC to operate off common supply rails without the need for anegative supply while preserving the full ADC code range. Thelow serial peripheral interface (SPI) clock rate requirementreduces the digital input/output power consumption, broadensprocessor options, and simplifies the task of sending data acrossdigital isolation.Operating from a 1.8 V supply, the AD4020 has a ±VREF fullydifferential input range with VREF ranging from 2.4 V to 5.1 V.The AD4020 consumes only 15 mW at 1.8 MSPS with a minimumSCK rate of 71 MHz in turbo mode and achieves ±3.1 ppm integralnonlinearity (INL), guaranteed no missing codes at 20 bits with100.5 dB typical signal-to-noise ratio (SNR). The reference voltageis applied externally and can be set independently of the supplyvoltage.The SPI-compatible versatile serial interface features seven differentmodes including the ability, using the SDI input, to daisy-chainseveral ADCs on a single 3-wire bus, and provides an optional busyindicator. The AD4020 is compatible with 1.8 V, 2.5 V, 3 V, and 5 Vlogic, using the separate VIO supply.The AD4020 is available in a 10-lead MSOP or a 10-lead LFCSPwith operation specified from −40°C to +125°C. The device ispin compatible with the 18-bit, 2 MSPS AD4003.
Throughput: 1.8 MSPS maximumINL: ±3.1 ppm maximumGuaranteed 20-bit no missing codesLow power9.0 mW at 1.8 MSPS (VDD only)83 μW at 10 kSPS, 15 mW at 1.8 MSPS (total)SNR: 100.5 dB typical at 1 kHz, 99 dB typical at 100 kHzTHD: −123 dB typical at 1 kHz, −100 dB typical at 100 kHzEase of use features reduce system power and complexityInput overvoltage clamp circuitReduced nonlinear input charge kickbackHigh-Z modeLong acquisition phaseInput span compressionFast conversion time allows low SPI clock ratesSPI-programmable modes, read/write capability, status wordDifferential analog input range: ±VREF0 V to VREF with VREF from 2.4 V to 5.1 VSingle 1.8 V supply operation with 1.71 V to 5.5 V logic interfaceSAR architecture: no latency/pipeline delayValid first accurate conversionGuaranteed operation: −40°C to +125°CSerial interface: SPI/QSPI/MICROWIRE/DSP compatibleAbility to daisy-chain multiple ADCs and busy indicator10-lead packages: 3 mm × 3 mm LFCSP, 3 mm × 4.90 mm MSOP
Order Code | Datasheet | Simulation | Downloads | Status | Product series | Z @ 100 MHz (Ω) | Zmax (Ω) | Test Condition Zmax | IR 2 (mA) | RDC max. (Ω) | Type | Samples | |
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742792141 | SPEC | 8 files | Active i| Production is active. Expected lifetime: >10 years. | WE-CBF SMT EMI Suppression Ferrite Bead | 1000 | 1100 | 90 MHz | 1000 | 0.3 | High Current |
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Order Code | Datasheet | Simulation | Downloads | Status | Product series | Z @ 100 MHz (Ω) | Zmax (Ω) | Test Condition Zmax | IR 2 (mA) | RDC max. (Ω) | Type | Samples |
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