Topology | Other Topology |
IC revision | A |
The LMK5B33216 evaluation module (EVM) is a platform for developing the LMK5B33216 network clock generator and synchronizer. The EVM can be used for device evaluation, compliance testing and system prototyping.LMK5B33216EVM integrates three analog phase-locked loops (APLLs) and three digital PLLs (DPLLs) with programmable-loop bandwidth. The EVM includes subminiature version A (SMA) connectors for clock inputs, oscillator inputs and clock outputs to interface the device with 50-Ω test equipment. The onboard temperature-compensated crystal oscillator (TCXO) allows the LMK5B33216 to be evaluated in free-running, locked or holdover mode of operation.LMK5B33216EVM can be configured through the onboard USB microcontroller (MCU) interface using a PC with TI clocks and synthesizers (TICS) pro software (TICSPRO-SW). TICSPRO-SW can be used to program the LMK5B33216 registers.
Three DPLLs with programmable bandwidths and three fractional APLLs for flexible clock generationTwo reference inputs to DPLL supporting hitless switching and holdover16 output clocks - outputs driven by bulk acoustic wave (BAW) capable of sub-50-fs root mean square (RMS) phase jitter (12 kHz to 20 MHz)Flexible oscillator sources - onboard TCXO, or one of several footprints for other crystal oscillator (XO), temperature-compensated crystal oscillator (TCXO), oven-controlled crystal oscillator (OCXO) or external SMA input optionsOn-chip electrically erasable programmable read-only memory (EEPROM) for custom startup clock configurations
Order Code | Datasheet | Downloads | Status | Product series | Pins (Value) (pcs) | Rows | Gender | Type | IR (A) | Packaging | Samples | |
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61000621121 | SPEC | 6 files | Active i| Production is active. Expected lifetime: >10 years. | WR-PHD 2.54 mm SMT Dual Pin Header | 6 | Dual | Pin Header | Straight | 3 | Tube |
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Order Code | Datasheet | Downloads | Status | Product series | Pins (Value) (pcs) | Rows | Gender | Type | IR (A) | Packaging | Samples |
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