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The LMK5C33414A evaluation module (EVM) is the LMK5C33414A network clock generator and synchronizer. The EVM can be used for device evaluation, compliance testing and system prototyping. The LMK5C33414A integrates three analog PLLs (APLL) and three digital PLLs (DPLL) with programmable loop bandwidth. The EVM includes SMA connectors for clock inputs, oscillator inputs, and clock outputs to interface the device with 50Ω test equipment. The onboard TCXO allows the LMK5C33414A to be evaluated in free-running, locked or holdover mode of operation. The EVM can be configured through the onboard USB microcontroller (MCU) interface using a PC with TICS Pro software graphical user interface (GUI). TICS Pro can be used to program the LMK5C33414A registers.
Three digital PLL (DPLL) with programmable bandwidths and three fractional analog PLLs (APLLs) for flexible clock generationFour reference inputs to the DPLL supporting hitless switching and holdover14 output clocks: outputs driven by BAW are capable of sub 50fs RMS phase jitter (12kHz to 20MHz)Flexible oscillator sources: onboard TCXO, or one of several footprints for other XO, TCXO, OCXO or external SMA input optionsOn-chip EEPROM for custom start-up clock configurations
Order Code | Datasheet | Downloads | Status | Product series | Pins (Value) (pcs) | Rows | Gender | Type | IR (A) | Packaging | Samples | |
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61000621121 | SPEC | 6 files | Active i| Production is active. Expected lifetime: >10 years. | WR-PHD 2.54 mm SMT Dual Pin Header | 6 | Dual | Pin Header | Straight | 3 | Tube |
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61000621121 | SPEC |
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Order Code | Datasheet | Downloads | Status | Product series | Pins (Value) (pcs) | Rows | Gender | Type | IR (A) | Packaging | Samples |
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