Topology | Other Topology |
Input voltage | 24 V |
Output 1 | 3.3 V / 0.01 A |
IC revision | E2 |
PLC applications requiring fast timing and fast cycle time can now be realized using this reference design which implements, an eight-port IO-Link master. It can be used to build a remote IO gateway to connect to OPC UA, Profinet, EtherCAT or Ethernet IP. A PRU-based frame handler enables a very flexible way of timing and time synchronization. This design helps build a very universal and scaleable IO-Link master.
Order Code | Datasheet | Simulation | |
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150060VS75000 | SPEC | ||
150060SS75000 | SPEC | ||
885012105012 | SPEC |
Samples |
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Order Code | Datasheet | Simulation | Downloads | Status | Product series | λDom typ. (nm) | Emitting Color | λPeak typ. (nm) | IV typ. (mcd) | VF typ. (V) | Chip Technology | 2θ50% typ. (°) | C | Tol. C | VR (V (DC)) | Size | Operating Temperature | DF (%) | RISO | Ceramic Type | L (mm) | W (mm) | H (mm) | Fl (mm) | Packaging | Samples |
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