Texas Instruments TPS82130SILR | Demoboard TIDA-01028

Description

This reference design provides a practical example of interleaved RF-sampling analog-to-digital converters (ADCs) to achieve a 12.8-GSPS sampling rate. This is achieved by time-terleaving two RF-sampling ADCs. Interleaving requires a phase shift between the ADCs, which this reference design achieves using the Noiseless Aperture Delay Adjustment (tAD Adjust) feature of the ADC12DJ3200. This feature is also used to minimize mismatches typical of interleaved ADCs: maximizing SNR, ENOB, and SFDR performance. A low phase noise clocking tree with JESD204B support is also featured on this reference design, and it is implemented using the LMX2594 wideband PLL and the LMK04828 synthesizer and jitter cleaner.

Features

• 3-mm × 2.8-mm × 1.5-mm MicroSiP™ Package
• 3-V to 17-V Input Range
• 3-A Continuous Output Current
• DCS-Control™ Topology
• Power Save Mode for Light Load Efficiency
• 20-μA Operating Quiescent Current
• 0.9-V to 6-V Adjustable Output Voltage
• 100% Duty Cycle for Lowest Dropout
• Power Good Output
• Programmable Soft Start-up with Tracking
• Thermal Shutdown Protection
• –40°C to 125°C Operating Temperature Range

Typical applications

• Telecom and Networking Applications
• Solid State Drives
• Industrial Applications

More information

• Datasheet
• IC product information