| Topology | Power Factor Correction |
| Input voltage | 600-1000 V |
| Switching frequency | 50-60 kHz |
| Output 1 | 400 V / 10 A |
| IC revision | E1 |
This reference design provides a design template for implementing a three-level, three-phase, silicon carbide/gallium nitride (SiC/GaN) based ANPC inverter power stage. The use of fast-switching power devices makes it possible to switch at a higher frequency of 100 kHz, reducing the size of magnetics for the filter and increasing the power density of the power stage. The multilevel topology allows the use of 600-V rated power devices at higher DC bus voltages of up to 1000 V. The lower switching voltage stress reduces switching losses resulting in a peak efficiency of 98.5%. This design is modular in construction, making it configurable to work with SiC or GaN power devices with the same filter stage.
Order Code | Datasheet | Simulation | Downloads | Status | Product series | PCB/Cable/Panel | Modularity | Wire Section | λDom typ.(nm) | Emitting Color | λPeak typ.(nm) | IV typ.(mcd) | VF typ.(V) | Chip Technology | 2θ50% typ.(°) | RDC(Ω) | L(µH) | ISAT(A) | fres(MHz) | VIN | VOut1(V (DC)) | IOut1(A) | Type of Insulation | fswitch(kHz) | ∫Udt(Vµs) | NPRI : NSEC | VT(V (RMS)) | L(mm) | Mount | Size | ISAT,30%(A) | Core Material | Working Voltage(V (AC)) | Operating Temperature | W(mm) | H(mm) | Ti | Tl(mm) | Pins | Z @ 100 MHz(Ω) | Zmax(Ω) | Test Condition Zmax | IR(A) | Z @ 1 GHz(Ω) | Type | Samples | |
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